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July 09, 2020
The Edge Computing and Intelligent Systems Revolution
According to Deloitte Digital, in the last 2 years, humans and machines have created 9 times more data than since the beginning of humanity and it continues to grow exponentially!
The vast majority of this data is generated by people, machines or objects located on the edge of the network and the Cloud. This is called the “Edge”.
Cisco estimates, for example, that only 10% of the data generated is “usable” and that only 25% of the usable data will reach a centralized data center! Most of the data will be ephemeral in nature and will not be saved or stored. This data must be processed in real time, where they are created. This is called “Edge Computing”.
The needs are very important: in industry, surveillance, smart cities, hospitals, telecommunications / 5G for drones, robots, gateways, etc… and in the data centers themselves, for example in storage servers.
To meet these new needs related to Edge Computing, new types of processor are required, capable of on the fly capture and analysis of a very large amount of information, close to where the data is generated and capable of reacting in real time based on this data. These are called an “intelligent” DPU (Data Processing Unit) processors.
Edge Computing needs heterogeneous multi-processing
Intelligent processors are different from AI processors which mainly support one function: to speed up calculations related to artificial intelligence. Intelligent processors are not only capable of executing artificial intelligence algorithms but in addition, simultaneously execute a wide set of different processing workloads such as mathematical algorithms, signal processing, network or storage software stacks. Heterogeneous multi-processing is a critical requirement for Edge Computing.
An autonomous car is a very good example of an intelligent system requiring heterogeneous multi-processing.
In order to assist or replace the driver, an autonomous car must continuously analyze its environment and this must to be done in real time. The amount of data to have safe visibility of the road, implies a very large stream of data from the sensors such as cameras, radars or Lidars. This raw data is of a different nature, and it requires performance of dozens of functions in parallel with respect to strict performance and safety criteria. For example, at the same time, the vehicle recognizes a sign, understands the sign’s road direction instruction, calculates the best path to take and predicts if a pedestrian is likely to cross, etc.
Using traditional architectures it would not be possible to achieve the right level of performance and function integration required in the next generations of cars. It is the reason why car manufacturers, to meet these challenges, are reinventing their own systems by introducing zone or domain architectures and by favoring an aggregation of functions within new intelligent processors.
Such intelligent processor already exists, Kalray’s Coolidge™, the 3rd generation of MPPA® (Massively Parallel Processor Array) DPU processor has been designed to address the challenges and constraints of Edge Computing. It combines not only high performance, low power, deterministic behavior, ease of programmability and security but Coolidge™also supports execution of many heterogeneous critical tasks in parallel on a single chip: a critical Edge Computing need!
Author:
Loic Hamon, Vice President, Corporate Development & Strategic Marketing at Kalray.
Before his time at Kalray, Loïc Hamon spent 10 years at Inside Secure. The last position he occupied was executive vice president of corporate development and communication. Prior to that, he was the vice president of Inside Secure’s NFC business unit. Loïc also served as director of strategic marketing for the wireless business unit of Texas Instruments after holding several strategic and operational marketing positions within TI. Loïc has earned a Master’s Degree in Marketing Intelligence at the HEC School of Management in Paris. He has also been awarded a Master’s Degree in Electrical Engineering from ESIGELEC in Rouen and a postgraduate degree in Microelectronics from Paris XI University.
